SPECIAL SESSION ORGANIZER

High-Performance Embedded Image and Signal Processing

Prof. Christopher Bobda
University of Arkansas, USA

Abstract

The growing capacity of VLSI devices is providing huge amount of resources to system designers. Very complex systems can nowadays be implemented on a single chip, with considerable performance increase and power saving features. In the mean-time despite progress in high-level design paradigms, our capability of leverage the available resource for complex applications is limited. Image and signal processing are two fields of applications that can actually benefit from exploiting the multimillion resource of VLSI, which will lead to more compact, low-power and cost-effective systems as required in embedded environments. To get there, efficient design methodologies that provide as seamless mapping image and signal processing algorithms onto architecture best tailored for the target applications are required. Reconfigurable devices like FPGA can provided an added value in making the system more flexible, while maintaining its performance.
The purpose of the session “High-Performance Embedded Image and Signal Processing” is to bring researchers working in the field of image processing, signal processing, system on chip, computer architecture and embedded systems with the goal of presenting their work and discussing ways to bridge their knowledge in one unify approach for tackling the performance issues of image and processing applications in embedded environments.
Authors are encouraged to submit their paper under the IASTED-SIP submission page with a reference to this session.
Submitted manuscripts must not have been published previously nor be under consideration for publication elsewhere. Moreover, submission to this session will be deemed to imply that the manuscript will not be submitted elsewhere if accepted.

Background Knowledge Expected of the Participants

Fields of interest for this session are but not limited to:
-Massive Parallel Image and Signal Processing Methods
-Image and Signal Processing in System on Chips (SoCs) and Multicores
-FPGA Implementation of Signal and Video-Processing
-Case Studies of Image and Signal Processing with Embedded Processors
-Mapping approaches for Mapping Image Processing onto FP
-Tool support for Hardware/Software design of On-Chip Multiprocessor for Signal and/or Video applications
-Embedded Smart Cameras and Applications

Biography of the Special Session Organizer

Dr. Bobda received the Licence in mathematics from the University of Yaounde, Cameroon, in 1992, the diploma of computer science and the Ph.D. degree (with honors) in computer science from the University of Paderborn in Germany in 1999 and 2003 (In the chair of Prof. Franz J. Rammig) respectively. In June 2003 he joined the department of computer science at the University of Erlangen-Nuremberg in Germany as Post doc, under the direction of Prof Jürgen Teich. Dr. Bobda received the best dissertation award 2003 from the University of Paderborn for his work on synthesis of reconfigurable systems using temporal partitioning and temporal placement. In 2005 Dr. Bobda was appointed assistant professor at the University of Kaiserslautern. There he set the chair for Self-Organizing Embedded Systems that he led until October 2007. From 2007 to 2010 Dr. Bobda was Professor at the University of Potsdam and leader of The working Group Computer Engineering.
Dr. Bobda is member of The IEEE Computer Society, the ACM and the GI. He is also in the program committee of several conferences (FPL, FPT, RAW, RSP, ERSA, RECOSOC, DRS), the DATE executive committee as proceedings chair (2004, 2005, 2006, 2007, 2008). He served as reviewer of several journals (IEEE TC, IEEE TVLSI, Elsevier Journal of Microprocessor and Microsystems, Integration the VLSI Journal) and conferences (DAC, DATE, FPL, FPT, SBCCI, RAW, RSP, ERSA), and as guest editor of the Hindawi International Journal of Reconfigurable Computing and the Elsevier Journal of Microprocessor and Microsystems. Dr. Bobda is the author of one of first the most comprehensive book in the rapid growing field of Reconfigurable Computing.